Radically improve
global computation
Radically improve
global computation
Radically improve
global computation
$8M - Led by Khosla Ventures
Every breakthrough in human progress from curing diseases to exploring space depends on faster, more efficient computation.
Every breakthrough in human progress from curing diseases to exploring space depends on faster, more efficient computation.
Every breakthrough in human progress from curing diseases to exploring space depends on faster, more efficient computation.
Every breakthrough in human progress from curing diseases to exploring space depends on faster, more efficient computation.
ASTRUS IS:
ASTRUS IS:
Software tooling that empowers analog designers to create the world's most advanced microchips with AI
Software tooling that empowers analog designers to create the world's most advanced microchips with AI
Software tooling that empowers analog designers to create the world's most advanced microchips with AI
AI AS THE FOUNDATION
AI AS THE FOUNDATION
AI AS THE FOUNDATION
Rooted in the AlphaGo line of research, we're building a foundation model that learns semiconductor physics to design microchips that go beyond the limits of human capabilities.
Rooted in the AlphaGo line of research, we're building a foundation model that learns semiconductor physics to design microchips that go beyond the limits of human capabilities.
Rooted in the AlphaGo line of research, we're building a foundation model that learns semiconductor physics to design microchips that go beyond the limits of human capabilities.
THE ANALOG CHIP DESIGN CHALLENGE
THE ANALOG CHIP DESIGN CHALLENGE
THE ANALOG CHIP DESIGN CHALLENGE
While much of the microchip design process is automated, the most critical parts of modern chips are still hand-crafted by engineers.
Believe it or not, today circuit designers manually place a single transistor at a time, guided only by decades of experience and an intuitive understanding of physics.
This line of work is called Analog Design.
And it's also the biggest bottleneck holding back the next generation of computing.
While much of the microchip design process is automated, the most critical parts of modern chips are still hand-crafted by engineers.
Believe it or not, today circuit designers manually place a single transistor at a time, guided only by decades of experience and an intuitive understanding of physics.
This line of work is called Analog Design.
And it's also the biggest bottleneck holding back the next generation of computing.
While much of the microchip design process is automated, the most critical parts of modern chips are still hand-crafted by engineers.
Believe it or not, today circuit designers manually place a single transistor at a time, guided only by decades of experience and an intuitive understanding of physics.
This line of work is called Analog Design.
And it's also the biggest bottleneck holding back the next generation of computing.
IT'S JUST 1s AND 0s ...
IT'S JUST 1s AND 0s ...
IT'S JUST 1s AND 0s ...
Most chip design tools operate at the Digital Abstraction Layer; fast, convenient, but almost completely removed from physical reality.
Most chip design tools operate at the Digital Abstraction Layer; fast, convenient, but almost completely removed from physical reality.
... THEN PHYSICS SHOWS UP
... THEN PHYSICS SHOWS UP
... THEN PHYSICS SHOWS UP
As transistors shrink and frequencies rise, idealized 1s and 0s blur into analog behavior.
At the cutting edge, physics can't be ignored.
As transistors shrink and frequencies rise, idealized 1s and 0s blur into analog behavior.
At the cutting edge, physics can't be ignored.
As transistors shrink and frequencies rise, idealized 1s and 0s blur into analog behavior.
At the cutting edge, physics can't be ignored.
THE ART OF ANALOG DESIGN
THE ART OF ANALOG DESIGN
THE ART OF ANALOG DESIGN
Analog design is the art of mastering this physics, squeezing out every ounce of performance.
It can deliver 10× gains in speed or power.
But only through human craft, not automation.
Analog design is the art of mastering this physics, squeezing out every ounce of performance.
It can deliver 10× gains in speed or power.
But only through human craft, not automation.
Analog design is the art of mastering this physics, squeezing out every ounce of performance.
It can deliver 10× gains in speed or power.
But only through human craft, not automation.
WHY IT MATTERS (MORE THAN EVER)
WHY IT MATTERS (MORE THAN EVER)
WHY IT MATTERS (MORE THAN EVER)
The highest performance components in today's most advanced chips all depend on analog design.
Take NVIDIA's latest H100 GPU chip:
The highest performance components in today's most advanced chips all depend on analog design.
Take NVIDIA's latest H100 GPU chip:
The highest performance components in today's most advanced chips all depend on analog design.
Take NVIDIA's latest H100 GPU chip:
~30%
~30%
~30%
design effort goes to analog design. All done by hand.
design effort goes to analog design. All done by hand.
design effort goes to analog design. All done by hand.
~$1B
~$1B
~$1B
estimated cost in analog design of this single chip
estimated cost in analog design of this single chip
estimated cost in analog design of this single chip
WHY THIS HASN'T BEEN AUTOMATED
WHY THIS HASN'T BEEN AUTOMATED
WHY THIS HASN'T BEEN AUTOMATED
ASTRONOMICAL SEARCH SPACE
In practice, engineers place 5 to 20 transistors in a single layout — yet even for this seemingly small layout, there are more configurations than there are atoms in the universe.
In practice, engineers place 5 to 20 transistors in a single layout — yet even for this seemingly small layout, there are more configurations than there are atoms in the universe.
NEEDLE-IN-A-HAYSTACK
Out of all the possibilities, just a handful meet tight performance objectives, so every placement is trial-and-error craftwork.
Out of all the possibilities, just a handful meet tight performance objectives, so every placement is trial-and-error craftwork.
NEEDLE-IN-A-HAYSTACK
Out of all the possibilities, just a handful meet tight performance objectives, so every placement is trial-and-error craftwork.
ASTRONOMICAL SEARCH SPACE
In practice, engineers place 5 to 20 transistors at a time — yet even for this small layout, there are more configurations than there are atoms in the universe.
THE SOLUTION
THE SOLUTION
THE SOLUTION
The AI agent for physics-aware chip design
The AI agent for physics-aware chip design
DREAM --> REALITY
DREAM --> REALITY
DREAM --> REALITY
Astrus is the world's first working system that automates analog layouts
Astrus is the world's first working system that automates analog layouts
Astrus is the world's first working system that automates analog layouts
1000 layouts generated in seconds
1000 layouts generated in seconds
1000 layouts generated in seconds
HIGH-SPEED INTERCONNECTS
HIGH-SPEED INTERCONNECTS
HIGH-SPEED INTERCONNECTS
Our first focus: the analog circuits behind high-speed SERDES, the links that move data between chips at 224 Gbps and beyond.
They’re the backbone of AI-scale compute, enabling GPUs to communicate at massive bandwidths across data centers.
And yet, almost entirely designed by hand.
Our first focus: the analog circuits behind high-speed SERDES, the links that move data between chips at 226 Gbps and beyond.
They’re the backbone of AI-scale compute, enabling GPUs to communicate at massive bandwidths across data centers.
And yet, almost entirely designed by hand.
Our first focus: the analog circuits behind high-speed SERDES, the links that move data between chips at 224 Gbps and beyond.
They’re the backbone of AI-scale compute, enabling GPUs to communicate at massive bandwidths across data centers.
And yet, almost entirely designed by hand.
Our first focus: the analog circuits behind high-speed SERDES, the links that move data between chips at 226 Gbps and beyond.
They’re the backbone of AI-scale compute, enabling GPUs to communicate at massive bandwidths across data centers.
And yet, almost entirely designed by hand.
And this is just the beginning …
Our achitecture is built to scale across circuits, tech nodes, and foundries.
And this is just the beginning …
Our achitecture is built to scale across circuits, tech nodes, and foundries.
And this is just the beginning …
Our achitecture is built to scale across circuits, tech nodes, and foundries.
INSPIRED BY ALPHAGO. BUILT FOR SILICON.
INSPIRED BY ALPHAGO. BUILT FOR SILICON.
INSPIRED BY ALPHAGO. BUILT FOR SILICON.
We’ve adapted the core ideas behind AlphaGo and applied them to physics-aware chip design.
Our system learns through self-play, generating trillions of designs while developing the intuition behind what makes a circuit exceptional.
Like AlphaGo, Astrus combines reinforcement learning, deep learning, and search to master layout from first principles, not by copying humans.
We’ve adapted the core ideas behind AlphaGo and applied them to physics-aware chip design.
Our system learns through self-play, generating trillions of designs while developing the intuition behind what makes a circuit exceptional.
Like AlphaGo, Astrus combines reinforcement learning, deep learning, and search to master layout from first principles, not by copying humans.
We’ve adapted the core ideas behind AlphaGo and applied them to physics-aware chip design.
Our system learns through self-play, generating trillions of designs while developing the intuition behind what makes a circuit exceptional.
Like AlphaGo, Astrus combines reinforcement learning, deep learning, and search to master layout from first principles, not by copying humans.
“We’re scaling one of the most under-utilized approaches in modern AI: training agents from scratch, with a good simulator and a clear objective, to surpass human intuition.”
“We’re scaling one of the most under-utilized approaches in modern AI: training agents from scratch, with a good simulator and a clear objective, to surpass human intuition.”
Kenny Young, Phd.
Founding Research Scientist, Graduated under Rich Sutton
AI SYSTEM OVERVIEW
AI SYSTEM OVERVIEW
AI SYSTEM OVERVIEW
Astrus is built around a fast, scalable reinforcement learning loop that's designed to generate and evaluate trillions of analog layouts in simulation.
Astrus is built around a fast, scalable reinforcement learning loop that's designed to generate and evaluate trillions of analog layouts in simulation.
Astrus is built around a fast, scalable reinforcement learning loop that's designed to generate and evaluate trillions of analog layouts in simulation.
DESIGNED IN PARTNERSHIP WITH THE WORLD'S LEADING CHIP FABS
DESIGNED IN PARTNERSHIP WITH THE WORLD'S LEADING CHIP FABS
DESIGNED IN PARTNERSHIP WITH THE WORLD'S LEADING CHIP FABS
Astrus is built with a deep understanding of the realities of manufacturing.
Trained end-to-end, it balances performance, and manufacturability in a single flow, producing layouts that are not just functional but ready for tapeout.
Astrus is built with a deep understanding of the realities of manufacturing.
Trained end-to-end, it balances performance, and manufacturability in a single flow, producing layouts that are not just functional but ready for tapeout.
Astrus is built with a deep understanding of the realities of manufacturing.
Trained end-to-end, it balances performance, and manufacturability in a single flow, producing layouts that are not just functional but ready for tapeout.
COLLABORATING WITH THE WORLD'S TOP CHIP DESIGNERS
COLLABORATING WITH THE WORLD'S TOP CHIP DESIGNERS
COLLABORATING WITH THE WORLD'S TOP CHIP DESIGNERS
Astrus is developed hand-in-hand with some of the top analog designers in the world.
Our in-house experts have taped out high-speed circuits on bleeding-edge nodes.
We also work closely with design partners, many of whom give real-time feedback, often just a call away.
This collaboration ensures Astrus is grounded in the realities of advanced analog layout, and designed for serious designers who know what great looks like.
Astrus is developed hand-in-hand with some of the top analog designers in the world.
Our in-house experts have taped out high-speed circuits on bleeding-edge nodes.
We also work closely with design partners, many of whom give real-time feedback, often just a call away.
This collaboration ensures Astrus is grounded in the realities of advanced analog layout, and designed for serious designers who know what great looks like.
Astrus is developed hand-in-hand with some of the top analog designers in the world.
Our in-house experts have taped out high-speed circuits on bleeding-edge nodes.
We also work closely with design partners, many of whom give real-time feedback, often just a call away.
This collaboration ensures Astrus is grounded in the realities of advanced analog layout, and designed for serious designers who know what great looks like.
FUNDED BY TOP TIER INVESTORS
FUNDED BY TOP TIER INVESTORS
FUNDED BY TOP TIER INVESTORS
Khosla Ventures
1517 Fund
Drive Capital
Alumni Ventures
HOF Capital
Khosla Ventures
1517 Fund
Drive Capital
Alumni Ventures
HOF Capital
Khosla Ventures
1517 Fund
Drive Capital
Alumni Ventures
HOF Capital
Plug and Play
MVP Ventures
RiSC Capital
Pradeep Sindhu (Founder, Juniper Networks)
Raymond Chik (Founder, Untether AI)
Plug and Play
MVP Ventures
RiSC Capital
Pradeep Sindhu (Founder, Juniper Networks)
Raymond Chik (Founder, Untether AI)
Plug and Play
MVP Ventures
RiSC Capital
Pradeep Sindhu (Founder, Juniper Networks)
Raymond Chik (Founder, Untether AI)
RESULTING IN
RESULTING IN
RESULTING IN
Just as AlphaGo surpassed the world’s best players, our AI is on track to outperform the best human layout engineers, uncovering circuit designs no one has imagined.
We’re scaling toward one of the largest RL training runs ever attempted. Engineered to push designs past human limits.
Just as AlphaGo surpassed the world’s best players, our AI is on track to outperform the best human layout engineers, uncovering circuit designs no one has imagined.
We’re scaling toward one of the largest RL training runs ever attempted. Engineered to push designs past human limits.
Just as AlphaGo surpassed the world’s best players, our AI is on track to outperform the best human layout engineers, uncovering circuit designs no one has imagined.
We’re scaling toward one of the largest RL training runs ever attempted. Engineered to push designs past human limits.
Just as AlphaGo surpassed the world’s best players, our AI is on track to outperform the best human layout engineers, uncovering circuit designs no one has imagined.
We’re scaling toward one of the largest RL training runs ever attempted. Engineered to push designs past human limits.
GET IN CONTACT
GET IN CONTACT
GET IN CONTACT